/*
 * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
 *
 * SPDX-License-Identifier:	GPL-2.0
 */

#ifndef __MX6_COMMON_H
#define __MX6_COMMON_H

#define CONFIG_SYSCOUNTER_TIMER
#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
#define CONFIG_BOARD_POSTCLK_INIT		//配置board_postclk_init()

#ifndef CONFIG_MX6
#define CONFIG_MX6
#endif

/* Boot options */
#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
	defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL))
#define CONFIG_LOADADDR		0x80800000
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE	0x87800000
#endif
#else
#define CONFIG_LOADADDR		0x12000000
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE	0x17800000
#endif
#endif
#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

#define CONFIG_SYS_FSL_CLK		/* 配置使能get_clocks() */

/* SD/MMC */
#define CONFIG_FSL_ESDHC		/* 这两项组合配置使用get_clocks()*/
#define CONFIG_FSL_USDHC

/* GPIO */
#define CONFIG_MXC_GPIO

#define CONFIG_HUSH_PARSER

#endif
